[G-2] Modeling, Simulation and Characterization

[G-2-04] Resistance Modeling of Short-range Connections: Impact of Current Spreading

〇Davide Tierno¹, Victor Vega-Gonzalez¹, Simone Esposto¹, Ivan Ciofi¹ (1. imec (Belgium))

Presentation style: On-site (in-person)

https://doi.org/10.7567/SSDM.2022.G-2-04

We investigated the impact of current spreading (CS)
on the resistance of short-range connections by performing
simulations in Synopsys Sentaurus, based on a calibrated
resistivity model. As a case study, we considered
Vertical-Horizontal-Vertical (VHV) middle-of-line
(MOL) connections, recently introduced to boost the routing
of 4-Track (4T) standard cells (SDC). We analyzed the
impact of via and line geometry on VHV link resistance
(RLink). We found that low aspect ratios (AR) lines are
needed to minimize the average SDC resistance (RSDC).
We performed extensive resistance simulations of various
short-range connections and concluded that large AR
lines are indeed detrimental when RLink is dominated by
the vias. Finally, we show that ignoring CS can lead to significant miscalculations of Rlink in such scenarios.