Modeling and Simulation of Antiferroelectric FETs with Oxide Semiconductor Channel Using Half-Loop Hysteresis for Memory Applications

講演情報

Oral Presentation

Joint Session (Area1&2)

[G-6] Ferroelectric Devices

2022年9月28日(水) 13:30 〜 15:15 301 (3F)

Session Chair: Halid Mulaosmanovic (GlobalFoundries), Masaharu Kobayashi (Univ. of Tokyo)

15:00 〜 15:15

〇Xingyu HUANG¹, Yuki ITOYA¹, Zhuo LI¹, Takuya SARAYA¹, Toshiro HIRAMOTO¹, Masaharu KOBAYASHI¹ (1. Univ. of Tokyo (Japan))

Presentation style: On-site (in-person)

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