What are the Constraints for 1T-DRAM Operation via Reconfigurable Transistor?

Rohit Kumar Nirala

doi:https://doi.org/10.7567/SSDM.2022.J-10-02

講演情報

Oral Presentation

02: Advanced and Emerging Memories / New Applications

[J-10] DRAM, SRAM, and 3D NAND

2022年9月29日(木) 16:00 〜 17:45 303 (3F)

Session Chair: Norikatsu Takaura (Hitachi, Ltd.), Soichi Sugiura (Micron Technology Inc.)

16:15 〜 16:30

[J-10-02] What are the Constraints for 1T-DRAM Operation via Reconfigurable Transistor?

〇Rohit Kumar Nirala¹, Sandeep Semwal², Nivedita Rai³, Abhinav Kranti⁴ (1. Indian Institute of Technology Indore (India), 2. Indian Institute of Technology Indore (India), 3. Indian Institute of Technology Indore (India), 4. Indian Institute of Technology Indore (India))

Presentation style: On-site (in-person)

https://doi.org/10.7567/SSDM.2022.J-10-02

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講演情報

[J-10] DRAM, SRAM, and 3D NAND

[J-10-02] What are the Constraints for 1T-DRAM Operation via Reconfigurable Transistor?

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