A Simple Way to Fabricate Si N-/P-Channels CFET Using Si/Ge Multilayer Epitaxy, Direct S/D Implantation and Ge Selective Etching

Guang- Li Luo

doi:https://doi.org/10.7567/SSDM.2023.PS-1-02

講演情報

Poster Session

01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[PS-1] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

2023年9月7日(木) 15:00 〜 17:00 Shirotori Hall (Nagoya Congress Center)

[PS-1-02] A Simple Way to Fabricate Si N-/P-Channels CFET Using Si/Ge Multilayer Epitaxy, Direct S/D Implantation and Ge Selective Etching

^○Guang- Li Luo¹, Chun-Lin Chu¹, Szu-Hung Chen¹, Wei-Yuan Chang¹, Wen-Fa Wu¹ (1. Taiwan Semiconductor Research Institute (Taiwan))

https://doi.org/10.7567/SSDM.2023.PS-1-02

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講演情報

[PS-1] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[PS-1-02] A Simple Way to Fabricate Si N-/P-Channels CFET Using Si/Ge Multilayer Epitaxy, Direct S/D Implantation and Ge Selective Etching

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