A Simple Way to Fabricate Si N-/P-Channels CFET Using Si/Ge Multilayer Epitaxy, Direct S/D Implantation and Ge Selective Etching

Guang- Li Luo

講演情報

Short Oral Presentation

01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[SO-PS-01] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

2023年9月7日(木) 13:30 〜 14:00 Room F (224, Bldg. 2)

Session Chairs: Hidetoshi Oishi (Sony Semiconductor Solutions Corp.), Keisuke Yamamoto (Kyushu Univ)

13:32 〜 13:34

[SO-PS-01-02] A Simple Way to Fabricate Si N-/P-Channels CFET Using Si/Ge Multilayer Epitaxy, Direct S/D Implantation and Ge Selective Etching

^○Guang- Li Luo¹, Chun-Lin Chu¹, Szu-Hung Chen¹, Wei-Yuan Chang¹, Wen-Fa Wu¹ (1. Taiwan Semiconductor Research Institute (Taiwan))

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講演情報

[SO-PS-01] 01: Advanced CMOS: Material Science / Process Engineering / Device Technology

[SO-PS-01-02] A Simple Way to Fabricate Si N-/P-Channels CFET Using Si/Ge Multilayer Epitaxy, Direct S/D Implantation and Ge Selective Etching

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