Implementation of Projection Mapping System Using FPGA

Yoshitaka Nagano

doi:https://doi.org/10.36463/idw.2020.0651

14:40 〜 15:00

[PRJ4-1(Invited)] Implementation of Projection Mapping System Using FPGA

*Yoshitaka Nagano¹, Junko Sugimori² (1. Aichi University of Technology (Japan), 2. J. F. Oberlin University (Japan))

geometric correction, free-from surface, mannequin, pipeline, cache circuit

https://doi.org/10.36463/idw.2020.0651

We developed a system that uses separate devices for video output and video correction, to easily and inexpensively map projections onto 3D objects with free-form surfaces. An FPGA board was used as the correction device. Furthermore, we describe the details regarding the geometric correction circuit designed for the FPGA board.

Proceedings of the International Display Workshops Volume 27 (IDW '20)

[PRJ4-1(Invited)] Implementation of Projection Mapping System Using FPGA