The Japan Society of Applied Physics

[5-3] Stacked-Gate Avalanche-Injection Type MOS (SAMOS) Memory

H. Iizuka, T. Sato, F. Masuoka, K. Ohuchi, H. Hara, H. Tango, M. Ishikawa, Y. Takeishi (1.Toshiba Research and Development Center, Tokyo Shibaura Electric Co., Ltd.)

https://doi.org/10.7567/SSDM.1972.5-3