The Japan Society of Applied Physics

[A-7-1] Realization of Four-Valued Logic Circuits by NMOS Devices

S. Zaima, Y. Yasuda, Y. Tokuda, K. Pak, T. Nakamura, A. Yoshida (1.Department of Electrical and Electronic Engineering, Toyohashi University of Technology)

https://doi.org/10.7567/SSDM.1984.A-7-1