[D-8-2] A 1k bit Josephson RAM Integrated with Variable Threshold Cells

Itaru KUROSAWA、Hiroshi NAKAGAWA、Akihiko YAGI、Susumu TAKADA、Hisao HAYAKAWA (1.Electrotechnical Laboratory)

https://doi.org/10.7567/SSDM.1984.D-8-2