[A-10-4] High Aspect Ratio Hole Filling with CVD Tungsten for Multi-level Interconnection

K. Suguro, Y. Nakasaki, S. Shima, T. Yoshii, T. Moriya, H. Tango (1.VLSI Research Center, Toshiba Corporation)

https://doi.org/10.7567/SSDM.1986.A-10-4