[A-7-3] Limit on Triode Region Drivability for a 0.1μm MOSFET, Predicted by Process/Device Simulation Including Parasitic Resistance
Itaru Kamohara、Shinichi Takagi、Tetsunori Wada、Kenji Natori
(1.ULSI Research Center, Toshiba Corporation)
https://doi.org/10.7567/SSDM.1989.A-7-3