[S-D-6] Mechanism Analysis of a Highly Reliable Graded Junction Gate/N- Overlapped Structure in MOS LDD Transistor

Y. Okumura、T. Kunikiyo、I. Ogoh、H. Genjo、M. Inuishi、M. Nagatomo、T. Matsukawa (1.LSI R&D Laboratory, Mitsubishi Electric Corp.)

https://doi.org/10.7567/SSDM.1989.S-D-6