[S-IV-4] 3 V Operation of 70 nm Gate Length MOSFET with New Double Punchthrough Stopper Structure
Takeshi HASHIMOTO, Yoshimi SUDOH, Hiroyuki KURINO, Akira NARAI, Shin YOKOYAMA, Yasuhiro HORIIKE, Mitsumasa KOYANAGI
(1.Research Center for Integrated Systems, Hiroshima University)
https://doi.org/10.7567/SSDM.1992.S-IV-4