3 V Operation of 70 nm Gate Length MOSFET with New Double Punchthrough Stopper Structure

Takeshi HASHIMOTO; Yoshimi SUDOH; Hiroyuki KURINO; Akira NARAI; Shin YOKOYAMA; Yasuhiro HORIIKE; Mitsumasa KOYANAGI

doi:https://doi.org/10.7567/SSDM.1992.S-IV-4

1992 International Conference on Solid State Devices and Materials

1992年8月26日〜 1992年8月28日
Tsukuba Center Building, Tsukuba, Japan

[S-IV-4] 3 V Operation of 70 nm Gate Length MOSFET with New Double Punchthrough Stopper Structure

Takeshi HASHIMOTO、Yoshimi SUDOH、Hiroyuki KURINO、Akira NARAI、Shin YOKOYAMA、Yasuhiro HORIIKE、Mitsumasa KOYANAGI (1.Research Center for Integrated Systems, Hiroshima University)

https://doi.org/10.7567/SSDM.1992.S-IV-4

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