The Japan Society of Applied Physics

[A-12-2] A 0.4μm Gate-All-Around TFT (GAT) Using a Dummy Nitride Pattern for High Density Memories

S. Maegawa、T. Ipposhi、S. Maeda、H. Nishimura、O. Tanina、H. Kuriyama、Y. Inoue、N. Tsubouchi (1.ULSI Laboratory, Mitsubishi Electric Corporation、2.Ryoden Semiconductor System Engineering Corporation)

https://doi.org/10.7567/SSDM.1994.A-12-2