Comparison of Fully Depleted and Partially Depleted Mode Transistors for Practical, High-Speed, Low-Power 0.35 μm CMOS/SIMOX Circuits

[S-II-7] Comparison of Fully Depleted and Partially Depleted Mode Transistors for Practical, High-Speed, Low-Power 0.35 μm CMOS/SIMOX Circuits

Akira Yoshino, Kouichi Kumagai, Nobuhisa Hamatake, Susumu Kurosawa, Koichiro Okumura (1.ULSI Device Development Laboratories, NEC Corporation)