[S-IV-10] Double-Level Cu Inlaid Interconnects with Simultaneously Filled Via-Plugs

G. Minamihaba, Y. Shimooka, H. Tamura, T. Iijima, T. Kawanoue, H. Hirabayashi, N. Sakurai, H. Ookawa, T. Obara, H. Egawa, T. Idaka, T. Kubota, T. Shimizu, M. Koyama, G. Ooshima, K. Suguro (1.ULSI Research Laboratories, Manufacturing Engineering Research Center, Semiconductor Division, TOSHIBA Corporation)

https://doi.org/10.7567/SSDM.1995.S-IV-10