[A-1-6] Optimized Shallow Trench Isolation Technology for DRAM Embedded Logic Process

T. Yamazaki, K. Ohno, N. Tsuchiya, T. Gocho (1.Process Development Department, LSI R&D Group, Core Technology & Network Company, Sony Corp.)

https://doi.org/10.7567/SSDM.1999.A-1-6