[C-10-3] An Improvement in Metal-Ferroelectric-Insulator-Semiconductor Structure for Ferroelectric Gate FET Memory Using a Silicon Nitride Buffer Layer

Hideki Sugiyama、Yuji Adachi、Toshiyuki Nakaiso、Minoru Noda、Masanori Okuyama (1.Area of Materials and Device Physics, Department of Physical Science, Graduate School of Engineering Science, Osaka University)

https://doi.org/10.7567/SSDM.1999.C-10-3