A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100 nm Strained Silicon-on-Insulator MOSFETs

Tsutomu Tezuka; Naoharu Sugiyama; Tomohisa Mizuno; Masamichi Suzuki; Shin-ichi Takagi

doi:https://doi.org/10.7567/SSDM.2000.C-8-1

[C-8-1] A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100 nm Strained Silicon-on-Insulator MOSFETs

Tsutomu Tezuka、Naoharu Sugiyama、Tomohisa Mizuno、Masamichi Suzuki、Shin-ichi Takagi (1.Advanced LSI Technology Laboratory, Corporate R&D Center, Toshiba Corporation、2.Environmental Engineering and Analysis Center, Corporate R&D center, Toshiba corporation)

https://doi.org/10.7567/SSDM.2000.C-8-1

2000 International Conference on Solid State Devices and Materials

[C-8-1] A Novel Fabrication Technique of Ultra-Thin and Relaxed SiGe Buffer Layers with High Ge Content for Sub-100 nm Strained Silicon-on-Insulator MOSFETs