[A-2-4] Impact of Gate Etch Damage and Profile in High Density DRAM Cell

Il-Gweon Kim、Jung-wan Bae、Jun-Ho Choy、Nam-Sung Kim、Young-Woo Kweon、Se-Kyoung Choi、Sung-Chul Kim、Joo-Seog Park、Ji-Byum Kim (1.TG4-P9, Memory R&D Division, Hynix Semiconductor Inc.)

https://doi.org/10.7567/SSDM.2001.A-2-4