[A-2-5] Effect of Poly Metal Gate Etch Post-Cleaning on the Tail Distribution of DRAM Data Retention Time

Nam-Sung Kim、Il-Gweon Kim、Jun-Ho Choy、Se-Kyeong Choi、Jo-Bong Choi、Young-Woo Kweon、Sung-Cheul Kim、Ju-Seok Park、Ji-Bum Kim (1.Technology Group 4, Memory R&D Division, Hynix Semiconductor Co., Ltd.)

https://doi.org/10.7567/SSDM.2001.A-2-5