GHz Clock Distribution Using Transmission Line Interconnect and CMOS Differential Driver Circuit in Si ULSI

Yoshisato Yokoyama; Tomohito Tsushima; Hiyouko Shinoki; Naohiro Takagi; Kazuya Masu

doi:https://doi.org/10.7567/SSDM.2001.B-2-4

[B-2-4] GHz Clock Distribution Using Transmission Line Interconnect and CMOS Differential Driver Circuit in Si ULSI

Yoshisato Yokoyama、Tomohito Tsushima、Hiyouko Shinoki、Naohiro Takagi、Kazuya Masu (1.Precision and Intelligence Laboratory, Tokyo Institute of Technology)

https://doi.org/10.7567/SSDM.2001.B-2-4

2001 International Conference on Solid State Devices and Materials

[B-2-4] GHz Clock Distribution Using Transmission Line Interconnect and CMOS Differential Driver Circuit in Si ULSI