Side-Gate Design for 50 nm Electrically Induced Source/Drain MOSFETs

Woo Young Choi; Byung Yong Choi; Jong Duk Lee; Byung-Gook Park

doi:https://doi.org/10.7567/SSDM.2001.F-2-5

[F-2-5] Side-Gate Design for 50 nm Electrically Induced Source/Drain MOSFETs

Woo Young Choi, Byung Yong Choi, Jong Duk Lee, Byung-Gook Park (1.Inter-university Semiconductor Research Center and School of Electrical Engineering, Seoul National University)

https://doi.org/10.7567/SSDM.2001.F-2-5

2001 International Conference on Solid State Devices and Materials

[F-2-5] Side-Gate Design for 50 nm Electrically Induced Source/Drain MOSFETs