[P-1-14] Optimization of Low Power Shallow Trench Isolation BiCMOS Technology for Mixed Anlog/Digital Application Systems
H. Nakajima, H. Kawai, C. Yoshino, H. Miyakawa, H. Sugaya, H. Takimoto, H. Nii, K. Inoh, Y. Katsumata, H. Ishiuchi
(1.System LSI Research & Development Center, Semiconductor Company, Toshiba Corp., 2.Semiconductor Company, Toshiba Corp.)
https://doi.org/10.7567/SSDM.2001.P-1-14