[P-1-18] Optimisation of Tunnel Barriers for nc-Si Single-Electron Transistors
Y. T. Tan, T. Kamiya, Z. A. K. Durrani, H. Ahmed
(1.Microelectronics Research Center, Cavendish Laboratory, University of Cambridge, 2.CREST)
https://doi.org/10.7567/SSDM.2001.P-1-18