[P3-10] Impact of Ti Deposition Condition and Subsequent RTA on Contact Resistance of W-Bit Line in sub-micron technology DRAM

Nam-Sung Kim、Il-Gweon Kim、Tae-Seok Kwon、Young-Woo Kweon、Se-Kyeong Choi、Tae-Un Youn、Soo-ik Jang、Joo-Seog Park、Dae-Young Park (1.Device-BC Team, Memory R&D Division, Hynix Semiconductor Inc.)

https://doi.org/10.7567/SSDM.2002.P3-10