[P3-4] Novel Nanoprocess for Vertical Double-Gate MOSFET Fabrication by Ion-Bombardment-Retarded Etching

Meishoku Masahara、Takashi Matsukawa、Ken-ichi Ishii、Yongxun Liu、Masayoshi Nagao、Hisao Tanoue、Takashi Tanii、Iwao Ohdomari、Seigo Kanemaru、Eiichi Suzuki (1.Nanoelectronics Research Institute, National Institute of AIST、2.School of Science and Engineering, Waseda University)

https://doi.org/10.7567/SSDM.2002.P3-4