No Defect Thermal Process for Thick SOI Bipolar Transistors with Trench Dielectric Isolations

Yoshiaki Nakayama; Koji Eguchi; Shoji Mizuno; Kazunori Kawamoto; Kenji Nakashima; Yukihiko Watanabe

doi:https://doi.org/10.7567/SSDM.2002.P9-2

2002 International Conference on Solid State Devices and Materials

2002年9月17日〜 2002年9月19日
Nagoya Congress Center, Nagoya, Japan

[P9-2] No Defect Thermal Process for Thick SOI Bipolar Transistors with Trench Dielectric Isolations

Yoshiaki Nakayama、Koji Eguchi、Shoji Mizuno、Kazunori Kawamoto、Kenji Nakashima、Yukihiko Watanabe (1.Device R & D DENSO CORPORATION、2.Toyota Central R & D Labs. Inc.)

https://doi.org/10.7567/SSDM.2002.P9-2

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