Channel direction impact of (110) surface Si substrate on performance improvement in sub-100 nm MOSFETs

Hidetatsu Nakamura; Tatsuya Ezaki; Toshiyuki Iwamoto; Mitsuhiro Togo; Nobuyuki Ikarashi; Masami Hane; Toyoji Yamamoto

doi:https://doi.org/10.7567/SSDM.2003.A-9-2

2003 International Conference on Solid State Devices and Materials

2003年9月16日〜 2003年9月18日
Keio Plaza Inter-Continental Tokyo (Keio Plaza Hotel), Tokyo, Japan

[A-9-2] Channel direction impact of (110) surface Si substrate on performance improvement in sub-100 nm MOSFETs

Hidetatsu Nakamura、Tatsuya Ezaki、Toshiyuki Iwamoto、Mitsuhiro Togo、Nobuyuki Ikarashi、Masami Hane、Toyoji Yamamoto (1.Silicon Systems Research Labs., NEC Corporation)

https://doi.org/10.7567/SSDM.2003.A-9-2

▲