The Japan Society of Applied Physics

2003 International Conference on Solid State Devices and Materials

2003 International Conference on Solid State Devices and Materials

Sep 16, 2003 - Sep 18, 2003
Keio Plaza Inter-Continental Tokyo (Keio Plaza Hotel), Tokyo, Japan

[B-8-1] Ni-salicided Poly-Si/poly-SiGe Layered Gate Technology for 65nm-node CMOSFETs

Akiyoshi Muto, Hiroshi Ohji, Takeshi Maeda, Kazuyoshi Torii (1.Semiconductor Leading Edge Technologies, Inc.(SELETE), Research Dept. 1)

https://doi.org/10.7567/SSDM.2003.B-8-1