Low Resistive Contacts of TiN-Barrier and Ru-Electrode Using PCM Sputtering for MIM-Ta2O5 Capacitors in Giga-Bit DRAMs

Yoshitaka Nakamura; Tsuyoshi Kawagoe; Hiroshi Sakuma; Hiromu Yamaguchi; Isamu Asano; Mitsuhiro Horikawa; Keiji Kuroki; Kenji Tanaka; Yasuhiko Ueda; Hidekazu Goto

doi:https://doi.org/10.7567/SSDM.2003.C-4-2

2003 International Conference on Solid State Devices and Materials

Sep 16, 2003 - Sep 18, 2003
Keio Plaza Inter-Continental Tokyo (Keio Plaza Hotel), Tokyo, Japan

[C-4-2] Low Resistive Contacts of TiN-Barrier and Ru-Electrode Using PCM Sputtering for MIM-Ta2O5 Capacitors in Giga-Bit DRAMs

Yoshitaka Nakamura, Tsuyoshi Kawagoe, Hiroshi Sakuma, Hiromu Yamaguchi, Isamu Asano, Mitsuhiro Horikawa, Keiji Kuroki, Kenji Tanaka, Yasuhiko Ueda, Hidekazu Goto (1.Elpida Memory, Inc.)

https://doi.org/10.7567/SSDM.2003.C-4-2

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