[D-4-4] Impact of Co-salicide capping layer on GIDL in High Voltage devices for Embedded Flash memory

Nam Sung Kim、Jing Zhao、Madhusudan Mukho、Qiang Huang、Yeow Keong Ng、Wong Wing Yew、How Koon Jauw、Young Seon You、Hyun Gu Yoon、Dhruva Shukla、Sang Hyun Han、Inn Swee Goh (1.Process Integration Department, Systems on Silicon Manufacturing Co. Pte. Ltd.)

https://doi.org/10.7567/SSDM.2004.D-4-4