[F-3-1] Process Realization for 3-D ICs using Fine Pitch Through Silicon Vias

L. Schaper, S. Spiesshoefer, S. Burkett, G. Vangara, Z. Rahman, S. Polamreddy (1.University of Arkansas, High Density Electronics Center)

https://doi.org/10.7567/SSDM.2004.F-3-1