SET/CMOS Hybrid Integration Process for Multiple-Valued Logics

K.-W. Song; Y.K. Lee; K.R. Kim; J.I. Huh; J.D. Lee; B.-G. Park; J. Han; Y.-W. Kim

doi:https://doi.org/10.7567/SSDM.2004.H-2-2

2004 International Conference on Solid State Devices and Materials

2004年9月14日〜 2004年9月17日
Tower Hall Funabori, Tokyo, Japan

[H-2-2] SET/CMOS Hybrid Integration Process for Multiple-Valued Logics

K.-W. Song、Y.K. Lee、K.R. Kim、J.I. Huh、J.D. Lee、B.-G. Park、J. Han、Y.-W. Kim (1.School of Electrical Engineering, Seoul National University、2.R&D Center, Samsung Electronics Co.)

https://doi.org/10.7567/SSDM.2004.H-2-2

▲