Room-Temperature Demonstration of Low-Voltage Static Memory Based on Negative Differential Conductance in Silicon Single-Hole Transistors

Masumi Saitoh; Hidehiro Harata; Toshiro Hiramoto

doi:https://doi.org/10.7567/SSDM.2004.H-2-3

[H-2-3] Room-Temperature Demonstration of Low-Voltage Static Memory Based on Negative Differential Conductance in Silicon Single-Hole Transistors

Masumi Saitoh、Hidehiro Harata、Toshiro Hiramoto (1.Institute of Industrial Science, University of Tokyo、2.Graduate School of Science and Engineering, Chuo University)

https://doi.org/10.7567/SSDM.2004.H-2-3

2004 International Conference on Solid State Devices and Materials

[H-2-3] Room-Temperature Demonstration of Low-Voltage Static Memory Based on Negative Differential Conductance in Silicon Single-Hole Transistors