Improvements of Electrical Properties with Reduced Transient-Enhanced-Diffusion for 65nm-node CMOS Technology using Flash Lamp Annealing

[P2-5] Improvements of Electrical Properties with Reduced Transient-Enhanced-Diffusion for 65nm-node CMOS Technology using Flash Lamp Annealing

Akira Mineji、Koji Yamashita、Fumio Ootsuka、Mitsuo Yasuhira、Tsunetoshi Arikado (1.Research Dept. 1, Semiconductor Leading Edge Technologies, Inc.)