[A-8-4] Low temperature divided CVD technique for TiN metal gate electrodes of p-MISFETs

Shinsuke Sakashita、Kenichi Mori、Kazuki Tanaka、Masaharu Mizutani、Masao Inoue、Shinichi Yamanari、Jiro Yugami、Hiroshi Miyatake、Masahiro Yoneda (1.Process Development Dept., Process Technology Development Div., Production and Technology Unit, Renesas Technology Corporation、2.Process Engineering Section, Wafer Process Engineering Dept., Renesas Semiconductor Engineering Corporation)

https://doi.org/10.7567/SSDM.2005.A-8-4