Direct measurement of the offset spacer effect on the carrier profiles in sub-50 nm p-MOSFETs

Hidenobu Fukutome; Takashi Saiki; Ryou Nakamura; Akihiro Usujima; Takayuki Aoyama

doi:https://doi.org/10.7567/SSDM.2005.B-9-3

2005 International Conference on Solid State Devices and Materials

2005年9月12日〜 2005年9月15日
International Conference Center Kobe, Kobe, Japan

[B-9-3] Direct measurement of the offset spacer effect on the carrier profiles in sub-50 nm p-MOSFETs

Hidenobu Fukutome、Takashi Saiki、Ryou Nakamura、Akihiro Usujima、Takayuki Aoyama (1.FUJITSU LABORATORIES LTD.、2.FUJITSU LIMITED, Advanced LSI development div.)

https://doi.org/10.7567/SSDM.2005.B-9-3

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