[D-6-2] The Reliability Characteristics of Wafer-Level Chip-Scale Package under Various Current Stressing

Heng-Yu Kung、Sheng Hsiung Chen、Yi-Shao Lai、Endruw Jahja、Wen-Kuan Yeh (1.Department of Electronic Engineering, National University of KaoHsiung、2.Department of Electrical Engineer, Tung Fang Institute of Technology、3.Stress-Reliability Lab, Advanced Semiconductor Engineering, Inc.)

https://doi.org/10.7567/SSDM.2006.D-6-2