The Japan Society of Applied Physics

[F-8-1] Process Integration of Low-Power and High-Speed 16Mb MRAM using Multi-Layer Wiring Technology

T. Kajiyama, S. Miura, Y. Asao, T. Ueda, H. Aikawa, M. Iwayama, K. Hosotani, M. Amano, M. Yoshikawa, K. Tsuchida, S. Ikegawa, T. Kishi, N. Shimomura, N. Ohshima, H. Hada, A. Nitayama, S. Tahara, H. Yoda (1.Center for Semiconductor Research & Development, Semiconductor Company, Toshiba Corporation, 2.Corporate Research & Development Center, Toshiba Corporation, 3.System Devices Research Laboratories, NEC Corporation)

https://doi.org/10.7567/SSDM.2006.F-8-1