Large Reduction in Standby Power Consumption Achieved with Stress-controlled SRAM Layout

H. Kudo; K. Ishikawa; R. Tanabe; H. Fukkutome; Y. Mishima; S. Satou; T. Sugii; F. Kihara; M. Okamoto; M. Yoshimura; T. Sugimachi; H. Hashimoto; M. Ohtsuki

doi:https://doi.org/10.7567/SSDM.2006.H-2-2

[H-2-2] Large Reduction in Standby Power Consumption Achieved with Stress-controlled SRAM Layout

H. Kudo, K. Ishikawa, R. Tanabe, H. Fukkutome, Y. Mishima, S. Satou, T. Sugii, F. Kihara, M. Okamoto, M. Yoshimura, T. Sugimachi, H. Hashimoto, M. Ohtsuki (1.FUJITSU LABOTARORIES LIMITED, 2.FUJITSU LIMITED)

https://doi.org/10.7567/SSDM.2006.H-2-2

2006 International Conference on Solid State Devices and Materials

[H-2-2] Large Reduction in Standby Power Consumption Achieved with Stress-controlled SRAM Layout