[H-2-3] Layout Independent Transistor with Stress-controlled and Highly Manufacturable STI Process

K. Horita、M. Ishibashi、H. Umeda、T. Kawahara、T. Ikeda、T. Yamashita、T. Kuroi、Y. Inoue (1.Process Technology Development Div., Renesas Technology Corp.)

https://doi.org/10.7567/SSDM.2006.H-2-3