The Japan Society of Applied Physics

[J-8-1] Highly scalable and WF-tunable Ni(Pt)Si/SiON TOSI-gate CMOS devices obtained in a CMP-less integration scheme

M. Muller、G. Bidal、A. Mondot、S. Denorme、C. Fenouillet-Beranger、F. Boeuf、D. Aime、M. Rafik、P. Gouraud、T. Kormann、G. Chabanne、A. Zauner、G. Braeckelmann、S. Bonnetier、D. Barge、C. Laviron、A. Toffoli、A. Tarnowka、S. Pokrant、T. Skotnicki (1.Philips Semiconductors、2.STMicroelectronics、3.Freescale、4.CEA-LETI)

https://doi.org/10.7567/SSDM.2006.J-8-1