[J-8-2] Sub-30 nm P-channel Schottky Source/Drain FinFETs: Integration of Pt3Si FUSI Metal Gate and High-κ Dielectric
Rinus T. P. Lee, Kian-Ming Tan, Andy Eu-Jin Lim, Tsung-Yang Liow, Guo-Qiang Lo, Ganesh Samudra, Dong Zhi Chi, Yee-Chia Yeo
(1.Silicon Nano Device Lab., Dept. of Electrical & Computer Engineering, National University of Singapore, 2.Institute of Materials Research and Engineering, 3.Institute of Microelectronics)
https://doi.org/10.7567/SSDM.2006.J-8-2