The Japan Society of Applied Physics

[A-1-5] Gate First PFET Poly-Si/TiN/Al2O3 Gate Stacks with Inversion Thicknesses Less than 15A for High Performance or Low Power CMOS Applications

B. P. Linder, V. Narayanan, V. K. Paruchuri, E. Cartier, S. Kanakasabapathy (1.IBM Semiconductor Research and Development Center, Research Division, 2.T. J. Watson Research Center, Yorktown Heights)