[B-6-3] LDMOS Model for Device and Circuit Optimization

M. Yokomichi、M. Miyake、T. Kajiwara、N. Sadachika、A. Yumisaki、H.J. Mattausch、M. Miura-Mattausch (1.Hiroshima University)

https://doi.org/10.7567/SSDM.2007.B-6-3