In-situ Doped Embedded-SiGe Source/Drain Technique for 32 nm-node pMOSFET

H. Okamoto; A. Hokazono; K. Adachi; N. Yasutake; H. Itokawa; S. Okamoto; M. Kondo; H. Tsujii; T. Ishida; N. Aoki; M. Fujiwara; S. Kawanaka; A. Azuma; Y. Toyoshima

doi:https://doi.org/10.7567/SSDM.2007.B-7-2

2007 International Conference on Solid State Devices and Materials

2007年9月18日〜 2007年9月21日
Tsukuba International Congress Center (EPOCHAL TSUKUBA), Ibaraki, Japan

[B-7-2] In-situ Doped Embedded-SiGe Source/Drain Technique for 32 nm-node pMOSFET

H. Okamoto、A. Hokazono、K. Adachi、N. Yasutake、H. Itokawa、S. Okamoto、M. Kondo、H. Tsujii、T. Ishida、N. Aoki、M. Fujiwara、S. Kawanaka、A. Azuma、Y. Toyoshima (1.Process & Manufacturing Engineering Center、2.System LSI Division, Toshiba Corporation Semiconductor Company)

https://doi.org/10.7567/SSDM.2007.B-7-2

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