Two-step Inverse Modeling for Estimation of Channel Impurity Pile-up

Toshiharu Nagumo; Kiyoshi Takeuchi; Yutaka Akiyama; Masami Hane

doi:https://doi.org/10.7567/SSDM.2007.B-8-3

2007 International Conference on Solid State Devices and Materials

2007年9月18日〜 2007年9月21日
Tsukuba International Congress Center (EPOCHAL TSUKUBA), Ibaraki, Japan

[B-8-3] Two-step Inverse Modeling for Estimation of Channel Impurity Pile-up

Toshiharu Nagumo、Kiyoshi Takeuchi、Yutaka Akiyama、Masami Hane (1.Device Platforms Research Laboratories, NEC Corporation、2.Advanced Device Development Division, NEC Electronics Corporation)

https://doi.org/10.7567/SSDM.2007.B-8-3

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