[D-2-5] Robust Flip-Flop against Soft Errors for Combinational and Sequential Logic Circuits
T. Uemura1, Y. Tosaka1, H. Matsuyama1, K. Takahisa2, K. Hatanaka2
(1.Fujitsu Microelectronics Ltd., 2.Osaka Univ., Japan)
https://doi.org/10.7567/SSDM.2008.D-2-5
